Whereas SiC switches have the overall lowest dynamic losses, they show higher static losses due to the lack of conductivity modulation and the necessary chip size limitations due to the still high SiC base material price. The frequency dependence of the total losses of the various 1200V configurations (Si-IGBT + Si freewheeling diode, Si IGBT + SiC Schottky diode, SiC-JFET cascode plus internal...

We propose a mode-locking method optimized for the cascode structure of an RF CMOS power amplifier. To maximize the advantage of the typical mode-locking method in the cascode structure, the input of the cross-coupled transistor is modified from that of a typical mode-locking structure. To prove the feasibility of the proposed structure, we designed a 2.4 GHz CMOS power amplifier with a 0.18 μm...

This paper presents an improved linearity variable-gain amplifier (VGA) in 0.18-µm CMOS technology. The lineari­ty improvement is resulted from employing a new combinational technique, which utilizes third-order-intermodulation (IM3) cancellation mechanism using second-order-intermodul­ation (­IM2) injection, and intermodulation distortion (IMD) sinking techniques. The proposed VGA gain cell co...

The improvement of a conventional Gyrator-C active inductor consisting of common-emitter configured and common-collector configured with resistance feedback is presented. The fixed passive resistor is replaced with tunable active resistor (TAR) to enhance the adjustability of the active inductor. Multi-regulated Cascode (MRC) circuit is applied to boost quality factor Q. Compared with the conve...

Although CMOS Time-of-Flight Range Image Sensors have been recently realized, the fabrication process is modified by inserting an extra mask layer to allow efficient TOF dependent charge transfer. This work focuses on the selection procedure of amplifiers to be used in the design of the TOF pixel using the standard CMOS process. From our analysis, it is found that the Cascode amplifier is the b...

In this work, a detailed comparison of four equivalent charge-sensitive, folded-cascode amplifiers in terms of noise performance is presented. A couple of complementary structures, one with a noise-optimised input nMOSFET and the other with a noise-optimised input pMOSFET were designed in 0.35 μm CMOS process by Austria MicroSystems (AMS). Another couple of complementary structures consisting o...