system the time constant of which is mainly related to the dumping resistance of the RLC series branch in the equivalent circuit. A second pole is introduced by the rectifier [6], so the whole system could be approximated by a two pole transfer function. Note that the PWM modulator moves the negative slope edge of the input voltage signal changing the duty cycle and consequently the amplitude o...

In this paper, an approach is proposed for extracting coupled RLC network from multi-level interconnects. The proposed approach starts with a step of partitioning the layout of the full-chip under consideration into several sublayouts, followed by steps of fracturing the partitioned layout and transforming into the three-dimensional structure. The layout is then classified into three species of...

We are the rst to develop SPICE compatible circuit model for reluctance K It can be combined with any reluctance based extraction method to perform RLC simulation directly without the need of inverting reluctance matrix back into inductance domain or modifying conventional simulator To build symmetrical reluctance matrix we also proposed blocked K method based on group concept to cover more mag...

Ozone is one of the favorable oxidant to use in home appliance and industry as disinfectant for food processing, food storage, odor abatement, groundwater remediation, and drinking water purification. The common and previous technical method for generating ozone uses a high voltage and low frequency. This kind of method has disadvantage of energy efficiency, size and weight. This paper proposed...

In this paper, we propose two electrical models of carpet and gasket Sierpenski patch antenna. In our approach, we replace the antenna structure by its equivalent rectangular patch. Then, we build the electrical model in which we extract the resonant circuit RLC parameters. Return losses of the models are compared to physical patch for frequency band [1GHz, 3GHz]. Simulation results given by ou...

This letter proposes a behavioral model for analyzing the ground current in medium-voltage (MV) inductors. The impedance between terminals and connection of inductors is measured by analyzer, which capacitive at low frequency. In order to characterize this impedance, multistage paralleled RLC circuit proposed. An analytical method further developed calculate parameters proposed equivalent circu...

Timing driven physical design, synthesis, and optimization tools need efficient closed-form delay models for estimating the delay associated with each net in an integrated circuit (IC) design. The total number of nets in a modern IC design has increased dramatically and exceeded millions. Therefore efficient modeling of interconnection is needed for high speed IC’s. This paper presents closed–f...

In this paper, we present an efficient method to simultaneously size wire widths and decoupling capacitance (decaps) areas for optimizing power/ ground (P/G) networks modeled as RLC linear networks subject to reliability constraints. We formulate the problem as a nonlinear optimization problem and propose an efficient gradient-based non-linear programming method for searching the solution. We a...

With the advancement of high frequency in the VLSI technology, the modeling of the interconnections is much important as the performance of the electronics systems is limited by interconnect related failure modes such as coupled noise and delay. Exact estimation of on-chip signal delay through RC tree network is difficult. Inductance causes noise in the signal waveforms, which can adversely aff...