We report a high-performance amorphous Indium-Gallium-Zinc-Oxide (a-IGZO) thin-film transistor (TFT) with new copper-chromium (Cu-Cr) alloy source/drain electrodes. The TFT shows a high mobility of 39.4 cm 2 ·V - 1 ·s - 1 a turn-on voltage of -0.8 V and a low subthreshold swing of 0.47 V/decade. Cu diffusion is suppressed because pre-annealing can protect a-IGZO from damage during the electrode...

This paper presents the impact of parameter optimization of n-type MOSFET for direct tunneling gate current using ultrathin Si3N4 and HfO2 with EOT (Equivalent Oxide Thickness) of 1.0 nm. This work is compared with TCAD santaurus simulation results to verify that accuracy of the model and excellent reduction in gate leakage with the introduction of the high-k gate dielectrics (HfO2 & Si3N4) in ...

This work demonstrates the feasibility to obtain copper nanoelectromechanical (NEMS) relays using a commercial complementary metal oxide semiconductor (CMOS) technology (ST 65 nm) following an intra CMOS-MEMS approach. We report experimental demonstration of contact-mode nano-electromechanical switches obtaining low operating voltage (5.5 V), good ION/IOFF (103) ratio, abrupt subthreshold swing...

Bottom-gate thin film transistors with amorphous zinc tin oxide channels were grown by atomic layer deposition. The films maintained their amorphous character up to temperatures over 500 C. The highest field effect mobility was 13 cm/V s with on-to-off ratios of drain current 10–10. The lowest subthreshold swing of 0.27 V/decade was observed with thermal oxide as a gate insulator. The channel l...

We report the fabrication and electron transport investigation of individual local-gated single-walled carbon nanotube field effect transistors (SWNT-FET) with high yield using a semiconducting-rich carbon nanotube solution. The individual semiconducting nanotubes were assembled at the selected position of the circuit via dielectrophoresis. Detailed electron transport investigations on 70 devic...

0038-1101/$ see front matter 2012 Elsevier Ltd. A http://dx.doi.org/10.1016/j.sse.2012.05.061 ⇑ Corresponding author. E-mail address: [email protected] (J. Wan). We experimentally demonstrate a field-effect transistor with a single front gate built on fully-depleted silicon-on-insulator substrate that possesses extremely steep switching slope ( 1 mV/decade) and gate-controllable hysteresis. ...

This paper reports significant improvements in the electrical performance of In0.53Ga0.47As metal-oxide-semiconductor field-effect transistors (MOSFET) by a post-gate CF4/O2 plasma treatment. The optimum condition of CF4/O2 plasma treatment has been systematically studied and found to be 30 W for 3–5 min. Approximately 5× reduction in interface trap density from 2.8 × 10 to 4.9 × 10 cmeV has be...

Low-doped silicon multi-nanowire field effect transistors with high ON/OFF ratio over 10 and a low subthreshold swing of 60–120 mV dec 1 are fabricated using lithographic semiconductor processes. The use of multi-nanowires instead of a single nanowire as sensing elements has shown improved device uniformity and stability in buffer solutions. The device stability is further improved with surface...

In this paper we propose a new 9 transistor 1-bit full adder. The proposed circuit performs efficiently in subthreshold region to employ in ultra low power applications. The main design objective for this new circuit is low power consumption and full voltage swing at a low supply voltage. The proposed cell also remarkably improves the power consumption, power delay product and has better noise ...