a novel low noise trans-impedance amplifier is proposed using low cost 0.18 µm cmos technology. a resistive-capacitive feedback is used to extend the bandwidth of the amplifier. as the structure is inductor less, it is suitable for low cost integrated optical interconnects. in this paper improved particle swarm optimization have applied to determine optimal trans-resistance and noise of propose...

Background and Objectives: In this paper, a new design strategy was proposed in order to enhance bandwidth and efficiency of power amplifier. Methods: To realize the introduced design strategy, a power amplifier was designed using TSMC CMOS 0.18um technology for operating in the Ka band, i.e. the frequency range of 26.5-40GHz. To design the power amplifier, first a power divider (PD) with a ver...

In this paper a high resistant EMI interference CMOS operational amplifier has been designed and simulated. It is designed by implementing easy modification of the differential pair with active current load. The power amplifier seems to be leading the output voltage power with respect to the input supply given, the two stage power amplifier was designed in this current technology and results ar...

In this paper we design the low-power CMOS limiting amplifier using negative impedance, the purpose of using negative impedance is to increase the gain of the amplifier. low-power operations are also done using all the active elements. The LA was implemented in a standard CMOS 0.18um technology. This limiting amplifier is designed for the instrumentation(bio-medical) application. Gain of the am...

This paper presents a 30dBm (1W) class-E power amplifier projected in a standard 0.18-μm CMOS technology. The power amplifier (PA) consists in two differentials stages. The main stage employs a cascode class-E RF power amplifier with a self-biasing circuit. The driver stage uses the technique of Injection-Locking to substantially reduce the input power signal, maintaining a high gain. At 2.45 G...

A high accurate and low-voltage analog CMOS current divider which operates with a single power supply voltage is designed in 0.18µm CMOS standard technology. The proposed divider uses a differential amplifier and transistor in triode region in order to perform the division. The proposed divider is modeled with neural network while TLBO algorithm is used to optimize it. The proposed optimiza...

A high accurate and low-voltage analog CMOS current divider which operates with a single power supply voltage is designed in 0.18µm CMOS standard technology. The proposed divider uses a differential amplifier and transistor in triode region in order to perform the division. The proposed divider is modeled with neural network while TLBO algorithm is used to optimize it. The proposed optimiza...

In this paper, analysis, simulation and design of a distributed amplifier (DA) with 0.13µm CMOS technology in the frequency range of 3-40 GHz is presented. Gain cell is a current reused circuit which is optimum in gain, noise figure, bandwidth and also power dissipation. To improve the noise performance in the frequency range of interest, a T-matching low pass filter LC network which is utilize...

WSN is wireless sensor network which consist of numbers of nodes. Transceiver has main role in WSN node. Transceiver consists of both transmitter as well as receiver. Power amplifier, low noise amplifier, mixer, voltage control oscillator are the main block of Transceiver. Power amplifiers are a key part of RF transmitters. 2.4 GHz RF CMOS power amplifier implemented with SMIC 0.13μm is propose...

The comparator is designed in pipelined ADC. FINFET is the technology which performs the dual gate MOSFET. This thesis focuses on the high-speed design of pipelined ADC. In the meanwhile, we try to minimize the power dissipation as well. In this thesis, A semidigital Gm-based amplifier is proposed for a low-power pipelined analog-to-digital converter (ADC )in HSPICE .And also we compare the pow...