Exploiting Application Behaviors for Resilient Static Random Access Memory Arrays in the Near-Threshold Computing Regime

Exploiting Application Behaviors for Resilient Static Random Access Memory Arrays in the Near-Threshold Computing Regime

......................................................................................................................................... I Preface ......................................................................................................................................... III Acknowledgments ..............................................................................................

This paper presents a novel cache architecture using 7T/14T SRAM, which can improve its reliability with control lines dynamically. Our proposed 14T word-enhancing scheme can enhance its operating margin in word granularity by combining two words in a low-voltage mode. Furthermore, we propose a new testing method that maximizes the efficiency of the 14T word-enhancing scheme. In a 65-nm process...

SUMMARY This paper reports a 65 nm 8 Mb spin transfer torque mag-netoresistance random access memory (STT-MRAM) operating at a single supply voltage with a process-variation-tolerant sense amplifier. The proposed sense amplifier comprises a boosted-gate nMOS and negative-resistance pMOSs as loads, which maximizes the readout margin at any process corner. The STT-MRAM achieves a cycle time of 1....

This paper presents an efficient diagnosis scheme for RAMs. Three March-based algorithms are proposed to diagnose simple functional faults of RAMs. A March-15N algorithm is used for locating and partially diagnosing faults of bit-oriented or word-oriented memories, where N represents the address number. Then a 3N March-like algorithm is used for locating the aggressor words (bits) of coupling f...

Article history: Received 24 May 2015 Received in revised form 16 June 2015 Accepted 16 June 2015 Available online xxxx