-In many digital Very Large Scale Integration design, clock system is one of the most power consumption component. It consumes 30% to 60% of the total system power. As we are in need to reduce the power consumption on portable digital circuit because power budget is severely limited on portable digital circuit. To achieve this requirement, a clock system employing two techniques such as Dual Ed...

A Class-E/Fodd high power amplifier (PA) using the distributed active transformer (DAT) is demonstrated at 29MHz. The DAT combines the output power from four VDMOS push-pull pairs. The zero voltage switching (ZVS) condition is investigated and modified for the Class-E/Fodd amplifier with a non-ideal output transformer. All lumped elements including the DAT and the transistor package are modeled...

The class D amplifier is now well known in audio applications. Its excellent power ratio (greater than 90%) is the most important advantage. The MOS transistors switching power stage is able to drive a useful power up to 100W to the loud speaker. However, designing such an amplifier is more difficult than designing a classical class A or AB power amplifier. As a global and simple analysis is ra...

This paper presents techniques to assist the power supply designer in accurately modeling and designing the control loop of a switchmode DC/DC power supply. The three major components of the power supply control loop (i.e., the power stage, the pulse width modulator and the error amplifier) are presented with power stage modeling being the focus of this presentation. The power stage is modeled ...

Abstract A hybrid switching amplitude modulator for class-E2 EDGE polar transmitters is proposed. To achieve both high-efficiency and high-speed, it consists of a wideband buffered linear amplifier as a voltage source and a hysteresis-controlled switching amplifier as a dependent current source. The novel linear amplifier has a high current driving capability of approximately 160mA with a bandw...

The power requirements imposed on the amplifier by piezoelectric actuators is discussed. We consider a two-degree-of-freedom mechanical system driven by a piezoelectric stack for the purpose of analyzing power flow and power dissipation of four amplifiers. Two of the amplifiers are benchtop linear amplifiers. The other two amplifiers are based on switching topologies. The power consumption of a...

Flip-flops are critical timing elements in digital circuits which have a large impact on circuit speed and power consumption in VLSI circuits. In this paper, a dualedge triggered flip-flop with high performance and clock gated sense amplifier flip-flop is designed. Moreover, the pulse generator can be shared among many flip-flops to reduce the power dissipation and chip area. By incorporating t...

In this paper different variations of the so-called “Tune-and-Select” (TAS) switching node for Optical Burst Switching (OBS) are investigated. Both signal degradation and burst losses limit the effective throughput of such optical burst switching nodes. These limitations are analysed for different nodes with four input/output fibres at different bit rates. The impact of amplifier noise figure, ...

The main difference in topology of a boost bridgeamplifier and state-of-the-art class-D amplifier is in theconnection of a loudspeaker between a power supply and aswitching bridge. The boost bridge amplifier provides fourtimes higher peak power at the loudspeaker than the power,which can be achieved by a class-D amplifier from the samepower supply. Total harmonic distort...