We consider how to distribute sparse matrices among processors to reduce communication cost in parallel sparse matrix computations, in particular, sparse matrix-vector multiplication. We allow 2d distributions, where the distribution (partitioning) is not constrained to just rows or columns. The fine-grain model is a 2d distribution introduced in [2] where nonzeros can be assigned to processors...

In this thesis, we apply the pattern recognition and data processing strengths of machine learning to accomplish traffic analysis objectives. Traffic analysis relies on the use of observable features of encrypted traffic in order to infer plaintext contents. We apply a clustering technique to HTTPS encrypted traffic on websites covering medical, legal and financial topics and achieve accuracy r...

Cache utilisation is often very poor in multithreaded applications, due to the loss of data access locality incurred by frequent context switching. This problem is compounded on shared memory multiprocessors when dynamic load balancing is introduced and thread migration disrupts cache content. In this paper, we present a technique, which we refer to as ‘batching’, for reducing the negative impa...

The superplastic behavior of fine-grained metals is well described by the deformation model in which grain boundary sliding (GBS) is accommodated by slip. This slip accommodation process involves the sequential steps of glide and climb, with climb assumed to be the ratecontrolling process. The climb distance during GBS is often considered to be on the order of grain size in the conventional the...

Dynamic reconfiguration is possible on both fine-grain and coarse-grain architectures. One of the used methodology used consists in the use of multi-context architectures. Unfortunately, the multiple contexts bring power and area overhead. This paper introduces the Dynamic Unifier and reConfigurable blocK (DUCK) concept, a new structure to perform efficiently dynamic reconfiguration on both cus...

In many computations, average data rates are often significantly lower than the peak rate possible. Consequently, VLSI systems capable of processing data at a maximum specified rate can be excessively dissipative when data rates are low. Such inefficiencies are particularly pronounced in heavily pipelined designs, in which registers account for the bulk of energy dissipation in a system. This p...

In this study we show that fine-grain multithreading is an effective way to increase instruction-level parallelism and hide the latencies of long-latency operations in a superscalar processor. The effects of long-latency operations, such as remote memory references, cachemisses, and multi-cycle floating-point calculations, are detrimental to performance since such operations typically cause a s...

Many present-day microprocessors have ne grain parallelism, be it in the form of a pipeline, of multiple functional units, or replicated processors. The eecient use of such architectures depends on the capability of the compiler to schedule the execution of the object code in such a way that most of the available hardware is in use while avoiding so-called dependences. In the case of one simple...

A system is proposed that is capable of identifying the true originator of an email message. This information can be combined with existing whitelist and blacklist technology to provide an effective anti-spam system. The approach is to store validation information that can be traced to the sender and to utilize a “Reachback URL” in the message to access the validation information. The approach ...

It is di cult to map the execution model of multithreading languages (languages which support ne-grain dynamic thread creation) onto the single stack execution model of C. Consequently, previous work on e cient multithreading uses elaborate frame formats and allocation strategy, with compilers customized for them. This paper presents an alternative cost-e ective implementation strategy for mult...