ÐData driven architectures have significant potential in the design of high performance ASICs. By exploiting the inherent parallelism in the application, these architectures can maximize pipelining. The key consideration involved with the design of a data driven ASIC is ensuring that throughput is maximized while a relatively low area is maintained. Optimal throughput can be realized by ensurin...

AbstPactAhfe RAM is RAM which has been made as reliable as a disk. W e coI1sider the problem of buffer management in partially safe buffers, i.e., butlers which contain both safe RAM and volatile RAM. Buffer managemnt techniques for partially safe buffers explicitly consider the safety of memory in deciding which data to place in the buffer, where to place it, and when to copy updaks back to th...

Branch target buffers (BTBs) are caches in which branch information is stored that is used for branch prediction by the fetch stage of the instruction pipeline. A typical BTB requires a few kbyte of storage which makes it rather large and, because it is accessed every cycle, rather power consuming. Partial resolution has in the past been proposed to reduce the size of a BTB. A partial resolutio...