The scaling down of technology in CMOS circuits, results in the down scaling of threshold voltage thereby increasing the sub-threshold leakage current. LECTOR is a technique for designing CMOS circuits in order to reduce the leakage current without affecting the dynamic power dissipation, which made LECTOR a better technique in leakage power reduction when compared to all other existing leakage...

Conventional leakage reduction techniques focus primarily on sub-threshold leakage mitigation, while neglecting the effect of gate leakage current. This work focuses on understanding gate leakage current and developing circuit techniques for total leakage minimization. We present an efficient technique for gate leakage of CMOS circuits. Input vector control and circuit reconfiguration technique...

To meet the ever-increasing demand of high performance systems, more and more functions are integrated into single chip by scaling down the size of device. Leakage current is becoming an increasingly important fraction of total power dissipation of integrated circuits. As technology scales leakage current grows exponentially and become and increasingly large component of total power dissipation...

There is a growing need to analyze and optimize the stand-by component of power in digital circuits designed for portable and battery-powered applications. Since these circuits remain in stand-by (or sleep) mode significantly longer than in active mode, their stand-by current, and not their active switching current, determines their battery life. Hence, stringent specifications are being placed...

P ower consumption is now the major technical problem facing the semiconductor industry. In comments on this problem at the 2002 International Electron Devices Meeting, Intel chairman Andrew Grove cited off-state current leakage in particular as a limiting factor in future microprocessor integration. 1 Off-state leakage is static power, current that leaks through transistors even when they are ...

The DRAM cells consist of one or several MOSFET devices and the subthreshold leakage current through the MOSFET strongly depends on the temperature variation. Therefore, it is obvious that the leakage of a memory cell is highly related to temperature variation. The temperature of the circuit can be measured indirectly by using leakage sensors which can be applied to various VLSI circuits becaus...

This paper aims to measure and analyze of the leakage current of 20 kV polymer and porcelain metal oxide surge arresters under humid ambient conditions by applying different voltages to the arresters terminal. The characteristics of the leakage currents at that stage have been investigated when changes in the ambient humidity were introduced in an artificial fog chamber. It is assumed that magn...

This paper presents logic level estimators of leakage current for nanoscale digital standard cell circuits. Here the proposed estimation model is based on the characterization of internal node voltages of cells and the characterization of leakage current in a single Field-Effect Transistor (FET). Finally the estimation model allowed direct implementation of supply voltage variation impact on le...