نتایج جستجو برای: maharishi vedic architecture
تعداد نتایج: 235952 فیلتر نتایج به سال:
Abstract Vedic cīti-, attested in the Atharvaveda, is argued to be related Av. ṣ̌āitī-, OP šiyāti- ‘happiness’ built PIE *kʷi̯eh₁- ‘to (come to) rest’.
The matrix multiplication is a computationally intensive problem and a prerequisite in various image processing applications like spatial and frequency filtering, edge detection and convolution. Being a core part of various applications in portable devices like mobile phones, demand for high speed and low power consumption is extremely high. This work demonstrates an effective design and effici...
High speed execution of arithmetic operations and high degree of precision in real time system are of major concern in any digital signal processing (DSP). Speed of DSP depends on speed of multiplier and algorithm used. In this paper we propose Residue Number System method for fast “carry free” floating point arithmetic operations. Floating Point RNS units have obvious advantages over tradition...
The capacity for semantic memory-the ability to acquire and store knowledge of the world-is highly developed in the human brain. In particular, semantic memory assimilated through an auditory route may be a uniquely human capacity. One method of obtaining neurobiological insight into memory mechanisms is through the study of experts. In this work, we study a group of Hindu Vedic priests, whose ...
The idea for designing the Divider unit is adopted from ancient Indian mathematics "Vedas" .Vedic Mathematics is the old method of computing. With the advent of new technology in the fields of VLSI and communication, there is also an always increasing demand for high speed processing and low area design. Divider is an important fundamental function in arithmetic operations. It is also known fac...
Processor speed largely governed by the multiplier architectures. It is desired to have faster ALU with lower power consumption for portable applications to have good battery life. Hence, there is need to address different multiplier architectures. In this paper, the analysis of 4-bit multiplier using a Vedic Mathematics (Urdhva Tiryagbhyam sutra) and conventional multiplier with two different ...
نمودار تعداد نتایج جستجو در هر سال
با کلیک روی نمودار نتایج را به سال انتشار فیلتر کنید