Scheduling product batches in pipelines is a very complex task with many constraints to be considered. Several papers have been published on the ubject during the last decade. Most of them are based on large-size MILP discrete time scheduling models whose computational efficiency greatly iminishes for rather long time horizons. Recently, an MILP continuous problem representation in both time an...

Research pipelines, such as those often found in computer vision or computational biology, often consist of a large number of heterogenous programs. This leads to brittle code that is difficult to maintain, while requiring significant effort to parallelize across multiple machines. We present a lightweight framework for specifying the execution of such pipelines. The structure imposed by our fr...

heuristics have been proposed for scheduling pipelined code, all assume, however, that pipeline constraints can occur after any instruction, and that operators. proaches are generally slower but more flexible than their heuristic couninstruction scheduling, since their dynamic reordering algorithms have limited scope. Optimierungsprobleme, Instruction Scheduling und Offset Assignment, when usin...

Instruction scheduling is essential for the eecient operation of today's and to-morrow's processors. It can be stated easily and declaratively as a logic program. Consistency techniques embedded in logic programming enable the eecient solution of this problem. This paper describes an instruction scheduling program for the Motorola 88100 RISC processor, which minimizes the number of pipeline sta...

Instruction scheduling consists of the rearrangement or transformation of program statements, usually at the intermediate language or assembly code level, in order to reduce possible run-time delays between instructions. Such transformations must preserve data dependency and are subject to other constraints. Highly optimizing compilers employing instruction-scheduling techniques have proven to ...

This paper presents work-in-progress to build a confidence-based in-kernel pipeline execution performance interface to a fixed priority deadline monotonic scheduler. The interface provides performance-controlled pipeline execution, allowing applications to specify expected execution times, negotiate desired deadline confidence and to configure and control pipelines. The confidence-based schedul...

Multiproduct pipelines permit to transport large volumes of a wide range of refined petroleum products from major supply sources to distribution centers near market areas. Batches of refined products and grades are pumped back-to-back in the same pipeline, often without any separation device between batches. The sequence and lengths of such pumping runs should be carefully selected in order to ...

Extensive research work has been reported on the scheduling of hardware pipelines and software pipelining independently, One interesting problem is how to extend hardware pipeline theory to handle software pipelined loops in user programs. More specifically , the problem is how to maximize the utilization of hardware resources under modulo scheduling for a given II. In this paper, we develop a ...

A process causes latency when it performs I/O or communication. Pipelined processes mitigate latency by concurrently executing multiple threads—sequences of operations—and overlapping computation, communication, and I/O. When more than one thread is ready to run, the scheduler determines which thread in fact runs. This paper presents techniques for scheduling pipelines, with the following three...

With the rapid construction of long-distance oil and gas pipelines, big pipeline network was gradually formed in China and its surrounding areas, therefore the management of pipeline production becomes increasingly complicated and difficult. In this paper, we propose a data model for pipeline production to support the planning, scheduling, distribution, metering, energy consumption, process tec...