نتایج جستجو برای: pipeline scheduling
تعداد نتایج: 97310 فیلتر نتایج به سال:
Many contemporary multiple issue processors employ out-of-order scheduling hardware in the processor pipeline. Such scheduling hardware can yield good performance without relying on compile-time scheduling. The hardware can also schedule around unexpected run-time occurrences such as cache misses. As issue widths increase, the complexity of such scheduling hardware increases considerably and ca...
Many contemporary multiple issue processors employ out-of-order scheduling hardware in the processor pipeline. Such scheduling hardware can yield good performance without relying on compile-time scheduling. The hardware can also schedule around unexpected run-time occurrences such as cache misses. As issue widths increase, however, the complexity of such scheduling hardware increases considerab...
Many contemporary multiple issue processors employ out-of-order scheduling hardware in the processor pipeline. Such scheduling hardware can yield good performance without relying on compile-time scheduling. The hardware can also schedule around unexpected run-time occurrences such as cache misses. As issue widths increase, however, the complexity of such scheduling hardware increases considerab...
Metacomputing is the seamless application of geographically-separated distributed computing resources to user applications. We consider the scheduling of metaapplications; applications consisting of multiple components that may communicate and interact over the course of the application. Components may be schedulable computations, remote servers or databases, remote instruments, humans-in-the-l...
The purpose of this paper is to describe an predictable CPU architecture, based on the five stage pipeline assembly line and a hardware scheduler engine. We aim at developing a fine-grained multithreading implementation, named nMPRA-MT. The new proposed architecture uses replication and remapping techniques for the program counter, the register file, and the pipeline registers and is implemente...
The pipeline pressure of blast furnace gas (BFG) system in steel industry provides effective information for the energy scheduling operations. However, due to the complexity of the byproduct gas pipeline network and the large fluctuations of the gas flow, it is rather difficult to establish an accurate prediction model for the pipeline pressure. Additionally, the quantitative reliability of the...
Striped FPGA [1], or pipeline-recon gurable FPGA provides hardware virtualization by supporting fast run-time recon guration. In this paper we show that the performance of striped FPGA depends on the recon guration pattern, the run time scheduling of con gurations through the FPGA. We study two main con guration scheduling approachesCon guration Caching and Data Caching. We present the quantita...
This paper presents a feasibility study of evolutionary scheduling for gas pipeline operations. The problem is complex because of several constraints that must be taken into consideration during the optimization process. The objective of gas pipeline operations is to transfer sufficient gas from gas stations to consumers so as to satisfy customer demand with minimum costs. The scheduling involv...
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