Few FPGAs support creation of partially reconfigurable systems when compared to traditional systems based on total reconfiguration. This allows dynamic change of the functionalities hosted on the device when needed and while the rest of the system continues its working. Runtime partial reconfiguration of FPGA is an attractive feature which offers countless benefits across multiple industries. X...

The need for dynamic reconfiguration is a complicating factor in the design of dependable systems, as it demands from software architects both rigour and planning. Although recent research has shown that systematic and integrated “specification-to-deployment” environments are promising approaches to architecting dependable systems, few proposals have yet considered dynamic reconfiguration, and ...

This paper presents a novel objective function for distribution system reconfiguration for reliability enhancement. When islanding operations of distributed generators is prohibited, faults in the feeder interrupt the operation of distributed generators. For this reason, we include the customer interruption cost as well as the distributed generator interruption cost in the objective function in...

We present a novel group-based mechanism to reconfigure the virtual topology of survivable MPLS/WDM networks by using the existing shared protection backup resource. With this mechanism, lightpaths are divided into groups and those in the same group can be reconfigured simultaneously at one step. Ideally, this mechanism won’t incur any service disruption during the reconfiguration process. The ...

Node importance degree is a vital index in distribution network reconfiguration because it reflects the robustness of the network structure by evaluating node importance. Since the traditional reconfiguration ignores this index, the reconstructed network structure may be vulnerable which would reduce the security and stability of the distribution systems. This paper presents a novel reconfigura...

An intensive use of reconfigurable hardware is expected in future embedded systems. This means that the system has to decide which tasks are more suitable for hardware execution. In order to make an efficient use of the FPGA it is convenient to choose one that allows hardware multitasking, which is implemented by using partial dynamic reconfiguration. One of the challenges for hardware multitas...

Today’s FPGAs (Field Programmable Gate Arrays) are widely used, but not to their full potential. In Virtex series FPGAs from Xilinx a special feature, the dynamic and partial reconfiguration is available. This feature enables a designer to create a system on chip with a static area and a reconfigurable part that can be exchanged during run-time while the remaining static portion is still operat...

The goal of optimal reconfiguration planning (ORP) is to find a shortest reconfiguration sequence to transform a modular and reconfigurable robot from an arbitrary configuration into another. This paper investigates this challenging problem for chain-typed robots based on graph representations and presents a series of theoretical results: (1) A formal proof that this is a NP-complete problem, (...

A risk of covert insertion of circuitry into reconfigurable computing (RC) systems exists. This paper reviews risks of hardware attack on field programmable gate array (FPGA)-based RC systems and proposes a method for secure system credentials generation (unique, random and partially anonymous) and trusted self-reconfiguration, using a secure reconfiguration controller (SeReCon) and partial rec...

System optimization techniques based on efficient dynamic reconfiguration have been widely adopted in recent years. Cache reconfiguration is a promising optimization technique for reducing memory hierarchy energy consumption with little or no impact on overall system performance. While cache reconfiguration is successful in desktop-based and embedded systems, it is not directly applicable in re...