to the success or failure Sizing transaction of a business, based on the processing systems level of performance the correctly is a difficult application provides. In task. By nature, transaction processing, transaction processing poor application applications are not performance can translate predefined and can vary directly into lost from the simple to the revenues. complex. Sizing during The...

Many methods have been developed for structural size and configuration optimization in which cross-sectional areas are usually assumed to be continuous. In most practical structural engineering design problems, however, the design variables are discrete. This paper proposes two efficient structural optimization methods based on the harmony search (HS) heuristic algorithm that treat both discret...

the iranian ministry of energy commands the regional electrical companies to install dg resources at 63kv/20kv substations and at the end of 20kv lines. the first and foremost challenge in installing these resources is deciding on the optimal place and capacity of these resources. this paper is aimed to propose an appropriate algorithm for siting and sizing such resources in bakhtar regional el...

this study deals with a two-level supply chain consisting of one manufacturer and one retailer. we consider an integrated production inventory system where the manufacturer processes raw materials in order to deliver finished product with imperfect quality to the retailer, where number of defective product has a uniform distribution. the retailer receives product and conducts a 100% inspection....

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In this paper we investigate the complexity of the economic lot-sizing problem with remanufacturing (ELSR) options. Whereas in the classical economic lot-sizing problem demand can only be satisfied by production, in the ELSR problem demand can also be satisfied by remanufacturing returned items. Although the ELSR problem can be solved efficiently for some special cases, we show that the problem...

We consider the problem of minimizing the delay in transporting a signal across a distance in a VLSI circuit.The problem can be restated as a combined buffer insertion, buffer sizing and wire sizing problem. We propose a simple buffering architecture for this problem and show that this architecture achieves a near optimal solution. We also derive simple models for a buffered wire which are suit...

In the present paper, we discuss one of the many processes arising in the context of supply chain management, namely production planning. We focus on one type of production planning models called capacitated lot sizing models. These models appear to be well suited for the usually rather in exible production resources found in the process industries. We review the literature on single-level sing...

We present an algorithm for delay minimization of interconnect trees by simultaneous buffer insertion/sizing and wire sizing in this paper. Both wire widths and buffer sizes are chosen from user-defined discrete sets. Our algorithm integrates the quadratic programming approach for handling a wire branch into the dynamic programming (DP) framework. Our experimental results show that our hybrid d...

This paper describes a tool called Focus that is currently being used for the timing ver$cation and sizing of domino CMOS circuits in a Power PCTM microprocessor Domino CMOS circuits introduce more complex timing and sizing requirements compared to conventional static circuits. This paper shows how these requirements are addressed in Focus. Some case studies involving the application of Focus o...