A Highly-Efficient and Tightly-Connected Many-Core Overlay Architecture

The technology advances of CPU (Central Processing Unit) architecture alternate between generalization and specialization. In the past decade, general performance has been enhanced while addressing new brick walls that include power, memory, ILP (Instruction-Level Parallelism). Thus, it will enter into era specialization called adaptable ISA (Instruction Set Architecture) for target applications. Reconfigurable devices such as FPGAs (Field Programmable Gate Array) can offer a solution if two following issues are addressed. One is FPGA design not easy non-hardware experts, other process iterative lengthy. most apparent to those problems an overlay abstract hardware details providing software-like interface. This article presents DRAGON (Dynamically Re-programmable Architecture Gather-scatter Overlay Nodes), demonstrates its aspects well way be seamlessly integrated any heterogeneous computing platform. experimental evaluation reports more than four times better computational efficiency when compared Intel Core i9 CPU, in stencil-based benchmarks.