A Multi-One Instruction Set Computer for Microcontroller Applications

This work presents a simple integer-only instruction set architecture and microarchitecture derived from One Instruction Set Computers (OISCs) embedding multiple execution modes ( mOISC), capable of running at reasonable performance level to enable basic usability in microcontroller applications. The purpose mOISC is data transfer tasks run small programs while maintaining ultimate simplicity. We present the internal organization for computer including an 8bit I/O register, 64kB central Random Access Memory (RAM), organized two-bytes words. processor can code generated assuming OISC or Complex Computer (CISC) scheme (op-code based), depending on programmer's demands based initial setting register during start-up. To practical applications demonstrate successful exploitation view integration compiler back-end, we designed custom Proof-of-Concept (PoC) software design toolchain LLVM clang. Although not targeting all features commercial ISA, compiling C intermediate representation generating translated ARM, x86, RISC-V, MIPS assembly. also enables Value Change Dump (VCD) simulations output with graphical plots CPU state associated symbols. A PoC system has been synthesized low power Field Programmable Gate Array (FPGA) verified wireless telemetry application Synchronous Peripheral Interface (SPI) RFM9x Long RAnge (LoRA) transceiver MAX30205 Inter Integrated Circuit (I 2 C) temperature sensor, using its port, bus interface implementation. occupies ~6% resources Cyclone 10LP FPGA, 1397 Adaptive Look-Up Tables (ALUTs) 461 dedicated logic registers. measured dynamic current consumption complete FPGA board 12mA 100MHz clock.