An integrated 2D systolic array for spelling correction
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چکیده
منابع مشابه
An integrated 2D systolic array for spelling correction
This paper presents a fully integrated spelling co-processor for speeding up the character string comparison process. The chip we present is architectured around a banded 2-D systolic array consisting of 69 processors and is able to process more than 2 million of words per second. The high regularity of the chip has been exploited for investigating a design methodology based on the automated ge...
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This paper presents a fully integrated co-processor for accelerating the character string comparison involved in the spelling correction process. The chip we present is based on a truncated 2-D systolic array of 69 processors and is able to perform up to 1.3 Gops. Real time spelling correction is possible on very large vocabularies since dictionaries of 200,000 items can be processed in only 0....
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ژورنال
عنوان ژورنال: Integration
سال: 1993
ISSN: 0167-9260
DOI: 10.1016/0167-9260(93)90006-x