Energy-Efficient Transmission Schedule for Delay-Limited Bursty Data Arrivals Under Nonideal Circuit Power Consumption

Power-efficient Delay-insensitive Codes for Data Transmission

Power-efficient delay-insensitive codes for data transmission

We have introduced and formalzred the notzon of dynamic delay-insensitive codes for data communicatlon. We descrabc serlF>ral codes and protocols designed to optimize sktching ranergy expendfjd at the data pans during data transmission zn asynchronous syskms. These mclude adaptaftons of some existing communtcation methods as ulell as somr neul techniques for rr-duczng energy used in dynamic dat...

Bursty Content Sharing Mechanism for Energy-Limited

The strategy to send data in high speed bursts has been observed to be useful for energy-efficient communication of wireless applications. In this paper we investigate how to apply this approach to peer-to-peer (P2P) content sharing. Our main focus is on battery savings that can be achieved by properly shaping the traffic at the application level. Our primary target is BitTorrent based content ...

Efficient computation of the area/power consumption versus delay tradeoff curve for circuit critical path optimization

The paper introduces a novel methodology to obtain the entire arealpower consumption versus delay tradeoff curve for the critical path of a combinational logic circuit in a very efficient way. Compared to other proposed ways based on the optimization of the whole circuit for every point of the tradeoff curve, in this work only a subset of the boolean network representing the circuit is optimize...

Circuit Optimization by Transistor Reordering for Minimization of Power Consumption under Delay Constraint

In this paper we address the problem of optimization of VLSI circuits to minimize power consumptioin while meeting performance goals. We present a method of estimating power consumptioin of a basic or complex CMOS gate which takes the internal cap,acitances of the gate into account. This method is used to select an ordering of series-connected transistors found in CMOS gates to achieve lower po...