Gate Drive Circuit Implementation for Parallel Connection of Power Devices Considering Parasitic Inductance

Switching IGBTs in parallel connection or with enlarged commutation inductance

Acknowledgements The results presented in this thesis were obtained during my employment as a scientific coworker at the The colleagues at EELE for the good working atmosphere. The students who supported me with their projects.

CMOS Digital Circuit Activity Considering Uncertainty of Gate Delays

|While estimating glitches or spurious transitions is challenge due to signal correlations, the random behavior of logic gate delays makes the estimation problem even more difcult. In this paper, we present statistical estimation of signal activity at the internal and output nodes of combinational and sequential CMOS logic circuits considering uncertainty of gate delays. The methodology is base...

Parasitic Power Collection in Shoe Mounted Devices

Possibilities for the " parasitic " collection of power from human walking motion are explored. The focus is on the walking action as a source of power because of the extensive range of motion and large dynamic forces associated with the heel strike and the bending of the sole. Two piezoelectric systems: a multilayer laminate made from PVDF foil and a unimorph piezoceramic composite (PZT); as w...

Gate Drive Characteristics and Requirements for Power MOSFETs

Active Gate Control for Parallel Operation of IGBT Devices

Asymmetry in power circuit layout, mismatch in gate drive circuits, and lack of carefully matched device selection commonly result in dynamic and static current mismatch during parallel operation of IGBT devices. This paper is aimed at presenting a technique for actively controlling the gate drive of the IGBT to ensure appropriate current sharing under transient and steady state conditions. The...