IMPROVING FPGA COMPONENTS OF CRITICAL SYSTEMS BASED ON NATURAL VERSION REDUNDANCY

The article is devoted to the problem of improving FPGA (Field Programmable Gate Array) components developed for safety related systems. are improved in checkability their circuits and trustworthiness results calculated on them support fault-tolerant solutions, which basic ensuring functional critical Fault-tolerant solu tions need protection from sources multiple failures, include hidden faults. They can be accumulated significant quanti ties during a long normal operation disrupt functionality with onset most responsible emer gency mode. Protection against faults ensured by circuits, aimed at manifestation therefore must supported conjunction results, taking into account decrease event increasing component emergency mode solved using natural version re dundancy inherent LUT-oriented architecture (Look-Up Table). This redundancy manifested existence many ver sions program code that preserve same hardware implementation. considered typical failures architecture. These malfunctions investigated standpoint consistency mani festation masking, respectively, modes versions code. Malfunctions identified bit distortion memory LUT units. Bits only observed potentially dangerous because they hide Moving bits checkable positions, mode, per formed choosing appropriate organizing several versions. Experiments carried out example an iterative array multiplier binary codes have shown effectiveness solve