Interleaving Modulation Schemes in Asymmetrical Dual Three-Phase Machines for the DC-Link Stress Reduction

The DC-Link capacitor plays a crucial role as far power density and reliability are concerned: it occupies approximately 40% of the inverter, causes 30% its failures. Asymmetrical dual three-phase (ADTP) multiphase arrangements gaining relevance in automotive sector for powertrain applications. This work focuses on reducing impact that widely used double zero sequence injection (DZSI) family PWM techniques have such bulky failure-prone component an ADTP arrangement by means interleaving techniques. By using Fourier integral formalism, input current spectra overall performance these been derived, terms rms value voltage ripple capacitor. Simulations shown choosing adequate scheme angle considerably relieves both stresses compared to noninterleaved operation. Reductions 84% 86% achieved at static operating points. Finally, averaging over WLTP standard driving cycle, reductions up 26% obtained under more realistic conditions. All this would enhance reduce size onboard capacitors future electric vehicles.