Limits for automatic verification of finite-state concurrent systems
نویسندگان
چکیده
منابع مشابه
Automatic Verification of Finite-State Concurrent Systems
School of Computer Science Carnegie Mellon University Pittsburgh, Pennsylvania 15213-3891, USA e-mail [email protected] Logical errors in finite-state concurrent systems such as sequential circuit designs and communication protocols are an important problem for computer scientists. They can delay getting a new product on the market or cause the failure of some critical device that is already in us...
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ژورنال
عنوان ژورنال: Information Processing Letters
سال: 1986
ISSN: 0020-0190
DOI: 10.1016/0020-0190(86)90071-2