Multicast-Aware High-Performance Wireless Network-on-Chip Architectures

Reliability and Performance Evaluation of Fault-aware Routing Methods for Network-on-Chip Architectures (RESEARCH NOTE)

Nowadays, faults and failures are increasing especially in complex systems such as Network-on-Chip (NoC) based Systems-on-a-Chip due to the increasing susceptibility and decreasing feature sizes. On the other hand, fault-tolerant routing algorithms have an evident effect on tolerating permanent faults and improving the reliability of a Network-on-Chip based system. This paper presents reliabili...

High-Performance, Scalable Optical Network-On-Chip Architectures

..................................................................................................................... III TABLE OF CONTENTS ................................................................................................... V LIST OF TABLES ........................................................................................................... VII LIST OF FIGURES ...............

Reliability and Performance Evaluation of Fault-aware Routing Methods for Network-on-Chip Architectures

doi: 10.5829/idosi.ije.2014.27.04a.01

Performance evaluation of network-on-chip interconnect architectures

Zooming in on Network-on-Chip Architectures

The aim of this paper is to expose the networking community to the concept of network-on-chip (NoC), an emerging field of study within the VLSI realm, in which networking principles play a significant role, and new network architectures are in demand. Networking researchers will find new challenges in exploring solutions to familiar problems such as network design, routing, and quality-of-servi...