Performance Evaluation of Memory-Centric ARMv8 Many-Core Architectures: A Case Study with Phytium 2000+

A Cross-Core Performance Model for Heterogeneous Many-Core Architectures

An accurate performance predictor to identify the most suitable core-architecture to execute each thread/workload in a heterogeneous many-core structure is proposed. The devised predictor is based on a linear regression model that considers several different parameters of the many-core processor architectures, including the cache size, issuewidth, re-order buffer size, load/store queues size, e...

a study on construction of iranian life tables: the case study of modified brass logit system

چکیده ندارد.

Many Core Hardware Architectures

Adding shared memory parallelism to FLASH for many-core architectures

In this paper we discuss evolutionary changes to FLASH to enable enhanced applications to run efficiently on both the current generation BG/P and the next generation BG/Q. We motivate the need for change by discussing current FLASH applications and the challenges they are facing on today’s architectures. Our solution to current challenges with a view to the next generation is mixed-mode MPI+Ope...

Memory Optimization in Codelet Execution Model on Many-core Architectures

The upcoming exa-scale era requires a parallel program execution model capable of achieving scalability, productivity, energy efficiency, and resiliency. The codelet model is a fine-grained dataflow-inspired execution model which is the focus of several tera-scale and exa-scale studies such as DARPA’s UHPC, DOE’s X-Stack, and the European TERAFLUX projects. Current codelet implementations aim t...