Real-time Extraction of MPEG-2 Stream Based on FPGA
نویسندگان
چکیده
منابع مشابه
Real { Time Mpeg { 2 Software
{ A single chip system for real{time MPEG{2 decoding can be created by integrating a dual{issue RISC processor with a small dedicated hardware for the variable length decoding (VLD) and block loading processes; a 32KB instruction RAM; and a 16KB data RAM. The VLD hardware performs the Huuman decoding on the input data. The block loader performs the half{sample prediction for motion compensation...
متن کاملReal-time Stream-based Monitoring
We introduce RTLola, a new stream-based specification language for the description of real-time properties of reactive systems. In real-time applications, data arrives at varying rates and in most cases it is hard to predict the input rate. The integration of sliding windows over real-time intervals with aggregation functions into RTLola allows us to detach fixed-rate output streams from the va...
متن کاملReal-Time intrusion detection alert correlation and attack scenario extraction based on the prerequisite consequence approach
Alert correlation systems attempt to discover the relations among alerts produced by one or more intrusion detection systems to determine the attack scenarios and their main motivations. In this paper a new IDS alert correlation method is proposed that can be used to detect attack scenarios in real-time. The proposed method is based on a causal approach due to the strength of causal methods in ...
متن کاملFPGA-Based Real-Time Digital Simulation
1 – This paper is an effort to develop an FPGAbased real-time digital simulator. FPGA is used instead of parallel processors to simulate electromagnetic transients in power systems. A sample single-phase test systems was used to examine the principle. The mathematical model for the power system under consideration is implemented and simulated using Xilinx ISE 4.2 software and ModelSim simulator.
متن کاملAn FPGA-Based Real-Time Event Sampler
This paper presents the design and FPGA-implementation of a sampler that is suited for sampling real-time events in embedded systems. Such sampling is useful, for example, to test whether real-time events are handled in time on such systems. By designing and implementing the sampler as a logic analyzer on an FPGA, several design parameters can be explored and easily modified to match the behavi...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
ژورنال
عنوان ژورنال: DEStech Transactions on Computer Science and Engineering
سال: 2018
ISSN: 2475-8841
DOI: 10.12783/dtcse/iceiti2017/18953