Selective I/O scan: A diagnosable design technique for VLSI systems

A Robust Control Design Technique for Discrete-Time Systems

A robust state feedback design subject to placement of the closed loop eigenvalues in a prescribed region of unit circle is presented. Quantitative measures of robustness and disturbance rejection are investigated. A stochastic optimization algorithm is used to effect trade-off between the free design parameters and to accomplish all the design criteria. A numerical example is given to illustra...

A VLSI Scan-Chain Optimization Algorithm for Multiple Scan-Paths

This paper presents an algorithm for the scanchain optimization problem in multiple-scan design methodology. The proposed algorithm, which consists of four phases, first determines pairs of scan-in and scan-out pins (Phase 1), and then assigns flip-flops to scan-paths by using a graph theoretical method (Phase 2). Next the algorithm decides connection-order of flipflops in each scan-path by usi...

A neuromorphic VLSI device for implementing 2D selective attention systems

Selective attention is a mechanism used to sequentially select and process salient subregions of the input space, while suppressing inputs arriving from nonsalient regions. By processing small amounts of sensory information in a serial fashion, rather than attempting to process all the sensory data in parallel, this mechanism overcomes the problem of flooding limited processing capacity systems...

Selective Scan Slice Grouping Technique for Efficient Test Data Compression

This paper presents a selective scan slice grouping technique for test data compression. In conventional selective encoding methods, the existence of a conflict bit contributes to large encoding data. However, many conflict bits are efficiently removed using the scan slice grouping technique, which leads to a dramatic improvement of encoding efficiency. Experiments performed with large ITC’99 b...

Let's Design Algorithms for VLSI Systems