Survey on Reliability Estimation in Digital Circuits

The aggressive technology scaling has significantly affected the circuit reliability. interaction of environmental radiation with devices in integrated circuits (ICs) may be dominant reliability aspect advanced ICs. Several techniques have been explored to mitigate effects and guarantee a satisfactory levels. In this context, estimating is crucial challenge that not yet overcome. For decades, several different methods proposed provide Recently, more faithfully incorporated these strategies susceptibility accurately. This paper overviews current trend for digital circuits. survey divides approaches into two abstraction levels: (i) gate-level incorporate layout information (ii) circuit-level traditionally explore logic characteristic combinational We also present an open-source tool incorporates previously methods. Finally, actual research aspects are discussed, providing newly emerging topic, such as selective hardening critical vector identification.