Evidence Exploration for Model Checking

It is widely believed that formal verification can play an essential role in the design and development of highconfidence computer-based systems. While a number of powerful formal verification techniques exist, their acceptance in the industrial sector has been limited in part by a perceived lack of usability. Research related to improving usability has targeted various stages of formal verification, including writing more understandable and less error-prone specifications, visualizing system dynamics via graphical languages such as statecharts and message sequence charts, shortening verification time (efficiency is a usability issue too), and generating meaningful error diagnostics.