Guest Editors’ Introduction: Special Issue on Variability and Aging

h THE CONSTANT EVOLUTION of electronic systems has been fueled by the continuous and tremendous progress of silicon technology manufacturing. Since 1960, when the first MOS transistor was manufactured with dimensions around 50 m, process technology has been constantly enhancing until the current 22-nm MOS technology. Every two years a new process generation roughly doubles the device density, following what is known as Moore’s law. Besides, every new generation offers faster devices that consume less energy by operation. This has put in the hands of architects more powerful and energy-efficient building blocks on top of which they have designed more effective architectures with increasing capabilities. Silicon MOSFETs have been the workhorse devices for information technologies during all these last decades. However, these technology advances have to deal with important challenges coming from physical limitations of the underlying transistors, which are affected by severe manufacturing process parameters variability and aging caused by electrical degradation of materials due to the intense electrical stress during operation. As the device dimensions shrink down into the atomic scale, inherent variability in the implemented device dimensions is observed due to materials granularity and the reduction of the manufacturing process resolution relative to the size of the devices. This is complemented by statistical feature variability introduced by the discreteness of charge that cannot be reduced by a further tightening of the process control. The main sources of such statistical variability are random discrete dopants fluctuation (the dominant source of statistical variability), line edge roughness of the gate, polysilicon and high-k granularity among others. The statistical variability acutely increases with the reduction of the device dimensions causing the need of introducing important use at device level, such as the use of novel 3D devices, as well as new design principles to keep the technology progress pace. In addition to this, as technology dimensions scale down, critical reliability mechanisms (negative bias temperature instability (NBTI), hot carrier injection, time-dependent dielectric breakdown (TDDB) and random telegraph noise among others) cause time-varying parameter degradations, impacting the reliability of systems and potentially reducing the life-span of contemporary circuits from tens of years to perhaps a few years in the near future if no adequate countermeasures are taken. In combination with random discrete dopants, the statistical nature of discrete defect charges associated with hot electron degradation and NBTI result into large transistor parameter changes leading to potential loss of performance and yield. Variability and aging, which affect the quality of systems, are a key challenge for IC designers, which motivated the edition of this special issue of Design and Test of Computers. The impact of variability and aging expands across the complete set of phases in the design of computers: manufacturing yield,