Methodology for Increasing Reliability of FPGA Design via Partial Reconfiguration
نویسندگان
چکیده
In the paper, the activities which aim at developing a methodology of fault tolerant systems design into FPGA platforms are presented. The methodology supports the detection and localization of soft errors in the design and recovery mechanism which is based on the principles of partial dynamic reconfiguration of the chip. The main features of methodology are presented in the paper.
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تاریخ انتشار 2012