On Finite Automaton One-Key Cryptosystems

This paper reviews some works on finite automaton one-key cryptosystems and related topics such as autonomous finite automata and Latin arrays. It is well known that shift registers are important sequence generators in stream ciphers. But shift registers are merely a special kind of autonomous finite automata. Finite automata were considered as suitable mathematical models of cryptosystems from structural viewpoint long ago [1, 2, 3, 4, 5]. And invertibility theory of finite automata had been used to design one-key, two-key and identity-based cryptosysatems [6, 7, 8, 9,10, 11,12,13,14, 15]. In this paper we give a survey of some works of ours on finite automaton one-key cryptosystems and related topics such as autonomous finite automata and Latin arrays. In w we recite some basic definitions and results in invertibllity theory of finite automata. We then in w mention two important results on bounded error propagation and feedforward invertibility. In w we explain a canonical form for one-key cryptosystems implemented by finite automata without expansion of the plaintext and with bounded propagation of decoding errors. w is devoted to Latin arrays. And w deals with autonomous finite automata. 1 Basic definitions and results Recall some definitions. A finite automaton, say M, is a quintuple < X, Y, S, 6, A >, where X is a nonempty finite set (the input aIphabetof M}, Y a nonempty finite set ( the output alphabet of M), S a nonempty finite set ( the state alphabet of M), 5 : S • X ~ S a single'valued mapping (the next state function of M), and A : S • X ~ Y a single-valued mapping (the output function of M). For any set A, by A* denote the set of all words (finite sequences) over A including the empty word r and by A ~ the set of all infinite-length words ( infinite sequences) over A. Expand the domains of ~ and A to $ • X* and S • (X* UX'~), respectively, as follows. ~(~,~) =~, ~(s,x~')=~(~,x)~(6(~,~),~'), 8ES, z E X , a E X * , al E X * U X ~. In other words, on an initial state s(0) of M an input sequence z(0), z(1) . . . . of M causes a state sequence s(0), s(1) . . . . of M and an output sequence y(0), y(1) , . . , of M according