Energy Efficient Design of Static Asymmetric Low Swing On-Chip Interconnect Circuits

S. Rajendar; P. Chandrasekhar; M. Asha Rani; Pradeep Kumar Reddy

سند علمی

Energy Efficient Design of Static Asymmetric Low Swing On-Chip Interconnect Circuits

S. Rajendar, P. Chandrasekhar, M. Asha Rani, Pradeep Kumar Reddy

چکیده

In this paper, an energy efficient design of asymmetric high performance low swing CMOS driver receiver pair for driving global on-chip interconnects is proposed. The design is implemented on 90nm CMOS technology using HSPICE. The proposed CMOS driver receiver pair reduces the power by 35.45% as compared to the static driver with conventional level converter (CLC). The design is also compared with the asymmetric source follower driver with level converter (ASDLC), which results in high performance and low power consumption with reduced circuit complexity. General Terms High performance, low power, circuit complexity, CMOS technology, driver, receiver, interconnect

اسناد مشابه

Energy Efficient Design of Static Asymmetric Low Swing On-Chip Interconnect Circuits
مقاله‌ی دسترسی آزاد۲۰۱۳International Journal of Computer ApplicationsS.Rajendar, P.Chandrasekhar, M.Asha Rani, B.K. Pradeep Kumar Reddy
Self-Calibrated Energy-Efficient and Reliable Channels for On-Chip Interconnection Networks
مقاله‌ی دسترسی آزاد۲۰۱۲Journal of Electrical and Computer EngineeringPo-TsangHuang, WeiHwang
Energy-Efficient Design of an Asynchronous Network-on-Chip
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Portable electronic devices will be limited to available energy of existing battery chemistries for the foreseeable future. However, system-on-chips (SoCs) used in these devices are under a demand to offer more functionality and increased battery life. A difficult problem in SoC
A 0.35-V 5,200-μm 2 2.1-MHz Temperature-Resilient Relaxation Oscillator With 667 fJ/Cycle Energy Efficiency Using an Asymmetric Swing-Boosted RC Network and a Dual-Path Comparator
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This article describes a 2.1-MHz relaxation oscillator (RxO) for energy-harvesting Internet-of-Things (IoT) sensor nodes. The RxO features an asymmetric swing-boosted RC network and dual-path comparator to surmount the challenges of sub-0.5-V operation while achieving temperature
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Design and Analysis of Energy Efficient Semi-Serial Link for On-Chip Communication
سند علمی۲۰۱۳M. Chennakesavulu, J. Raghu
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Energy Efficient Design of Static Asymmetric Low Swing On-Chip Interconnect Circuits

چکیده

اسناد مشابه

Energy Efficient Design of Static Asymmetric Low Swing On-Chip Interconnect Circuits

Self-Calibrated Energy-Efficient and Reliable Channels for On-Chip Interconnection Networks

Energy-Efficient Design of an Asynchronous Network-on-Chip

A 0.35-V 5,200-μm 2 2.1-MHz Temperature-Resilient Relaxation Oscillator With 667 fJ/Cycle Energy Efficiency Using an Asymmetric Swing-Boosted RC Network and a Dual-Path Comparator

Machine Learning Based Energy-Efficient Design Approach for Interconnects in Circuits and Systems

Design and Analysis of Energy Efficient Semi-Serial Link for On-Chip Communication