A 115-mW, 0.5- m CMOS GPS Receiver with Wide Dynamic-Range Active Filters
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چکیده
This paper presents a 115-mW Global Positioning System radio receiver that is implemented in a 0.5m CMOS technology. The receiver includes the complete analog signal path, comprising a low-noise amplifier, I-Q mixers, on-chip active filters, and 1-bit analog-digital converters. In addition, it includes a low-power phase-locked loop that synthesizes the first local oscillator. The receiver achieves a 2.8-dB noise figure (prelimiter), a 56-dB spurious-free dynamic range, and a 17-dB signal-to-noise ratio for a noncoherent digital back-end implementation when detecting a signal power of 130 dBm at the radio-frequency input.
منابع مشابه
The Design and Implementation of Low-power Cmos Radio Receivers a Dissertation Submitted to the Department of Electrical Engineering and the Committee on Graduate Studies of Stanford University in Partial Fulfillment of the Requirements for the Degree of Doctor of Philosophy
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تاریخ انتشار 1998