ASIC Technology for the Implementation of System-on-a-Chip

INTRODUCTION THE demand for higher functionality and technical complexity, and the implementation of smaller device size and lower power dissipation, present demanding technological challenges that need to be resolved for the emerging multimedia and portable markets. Today, a major problem is how to deal with time-to-market cycles (sales cycles) due to shorter product lifetimes and shorter design and development cycles. The solution is already here in the form of the system-on-a-chip ASIC fully capable of integrating microprocessor, memory, and analog circuits — and gate-array elements — all on a single chip. The main characteristics of these highly flexible ASIC products are value-added features like highly functional performance and high operating speed. Innovation in ASIC technology is closely linked to the evolution of process technology. In the past, we advanced from 3-μm gate arrays to 0.8-μm cell-based ICs with on-chip compiled RAM and ROM memory. Then, at the 0.5-μm process level, we introduced a ASIC Technology for the Implementation of System-on-a-Chip