A Differential Double Pass Transistor Logic Unit

In this paper we present a new differential logic unit with duplicated functional outputs. The logic functions as well as their inverses are implemented within a single Logic Unit (LU) cell. The hardware overhead for the implementation of the proposed LU is lower than the hardware overhead required for standard LU implemented with standard CMOS logic style. This new implementation is attractive as fewer transistors are required to implement important logic functions. The proposed differential logic unit can perform 8 Boolean logical operations by using only 16 transistors. Spice simulations using a 32nm technology was utilized to evaluate the performance of the proposed circuit.