The impact of signal transition time on path delay computation - Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on

It has been recognized for some time that nonzero signal rise and fall times contribute to gate propagation delays. Practically, however, most timing analysis tools ignore these contributions when computing path delays and identifying critical paths in combinational circuits. In this paper we describe how these rise and fall times can be incorporated into path analysis algorithms. Interestingly, we show that signal transition time information can be accounted for in a simple and efficient preprocessing step followed by the application of standard path analysis methods. This two-step approach is shown to predict path delays with sufficient accuracy without unnecessarily complicating path analysis.