VLSI Implementation of OFDM using Efficient Mixed-Radix 8-2 FFT Algorithm with bit reversal for the output sequences

In recent years, as a result of advancing VLSI technology, OFDM has received a great deal of attention and been adopted in many new generation wideband data communication systems such as IEEE 802.11a, HiPerLAN/2, digital audio/video broadcasting (DAB/DVB-T) and asymmetric digital subscriber line (ADSL), very high speed digital subscriber line (VDSL) in wireless and wired communications, respectively.FFT and IFFT are the main arithmetic kernel in the OFDM system. This paper discusses the computational complexity of several Fast Fourier Transform (FFT) algorithms, analyzes the design procedure for implementing these algorithms into hardware, and then proposes one that applies to OFDM communication system. The Mixed Radix 8-2 Butterfly FFT with bit reversal for the output sequence derived by index decomposition technique is our proposed architecture to design the prototype FFT/IFFT processor for OFDM systems. In this paper the analysis of several FFT algorithms such as radix-2, radix-4, split Radix and mixed radix 4-2 and the proposed mixed radix 8-2 were designed using VHDL and their performance are analysed. Then these FFTs are applied to OFDM system and it is implemented using VLSI design technique. The results show that the proposed processor architecture can save the area of approximately 7% and power more than 40%, which may be attractive for many real-time systems.