Multiprocessor Memory Hierarchies
نویسندگان
چکیده
parallel computer architecture; high performance system design; system bus; caches; memory hierarchies; shared memory machines Memory latency, bandwidth, and locality of reference will play larger roles in future parallel systems as processors speed up relative to main memory latency. Using an instruction level PA-RISe multiprocessor simulator, we examined hardware and software techniques that address these issues for small-scale, shared memory machines.
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تاریخ انتشار 1990