Fir Filter Design Based on Rounded and Truncated With Multiple Constant Multiplication and Accumulation

Low-cost and power efficient finite impulse response (FIR) designs are presented using the concept of faithfully rounded truncated multipliers. Here we consider the optimization of bit width and hardware resources without abdication of the frequency response and output signal precision in the process of accumulation of filter computations. Non uniform coefficient quantization with proper filter order is proposed to minimize total area cost. Multiple constant multiplication/accumulation (MCMA) in a direct FIR structure is implemented using an improved version of truncated multipliers. While Comparisons with prior FIR design like transposed structures which as huge digital novel components in the operation and we enhanced the architectural approaches show that the proposed designs achieve the best area and power results.