A CORDIC-based dynamically reconfigurable FPGA architecture for signal processing algorithms

CORDIC algorithm is very widely used in the digital signal processing systems. This article presents a CORDIC-based reconfigurable FPGA architecture that can be changed to perform different algorithms of signal processing. Two examples of CORDIC-based signal processing, such as FFT and SVD algorithms are surveyed in this paper. The fact that the common operator CORDIC is exploited in these algorithms makes them easily to be implemented on the same reconfigurable hardware. Specifically, the dynamic reconfiguration is performed for changing the interconnections between CORDIC. The dynamic reconfiguration method is used to improve both the reconfiguration time and the area efficiency.