Nanoscale electrical characterization of HfO2/SiO2 MOS gate stacks with enhanced - CAFM

2.Introduction The replacement in MOS devices of the so far almost perfect SiO2 by another material with a higher dielectric constant (high-k) has been proposed as a solution to the increase in gate current associated to device dimensions shrinking [1]. However, before the effective substitution of SiO2 in commercial IC’s, the electrical properties and reliability of these materials must be well characterized. Moreover, in deep sub-micron technologies, alternative characterization techniques are required to detect point-topoint variations in the device. In this direction, Conductive Atomic Force Microscopy (CAFM) allows the characterization of the gate dielectric with nanometer resolution. When working on bare gate surfaces, the CAFM tip plays the role of the metal gate of a MOS capacitor with an area of ~300nm. The CAFM has been shown to be very useful in the study of SiO2 and high-k materials electrical properties [2-4]. However, sometimes, its electrical capabilities are not enough. To overcome standard CAFM set up limitations, a prototype of CAFM with Enhanced electrical performance (ECAFM) has been developed. The ECAFM has been used to study the electrical properties and reliability of high-k gate stacks.