Ph . D . Progress Report - - - Report # 2
نویسنده
چکیده
This report summarizes my Ph.D. research progress from March 2001 to March 2002. This time period corresponds to part of the third and fourth year of my Ph.D. candidacy. As stated in my first report, the goal of my Ph.D. research is to create an efficient FPGA architecture for datapath circuits. My research methodology is empirical and consists of three phases, two of which have been completed as of March 2002. The first phase consisted of gathering a suite of real benchmark circuits. The second phase consisted of creating a complete synthesis, packing, placement, and routing CAD flow to map these benchmark circuits to my proposed FPGA architectures. During the third and final phase, I will design and perform experiments to study various datapath-oriented FPGA architectures using the benchmarks and the CAD tools.
منابع مشابه
Ph . D . Annual Progress Report for 2003
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تاریخ انتشار 2004