Harnessing an FPGA for Built-in Self-Repair in a 3D Die Stack

One of the main problems preventing the large scale manufacturing of 3D integrated circuits is the difficulty in testing die and obtaining high yields. However, a 3D stack also provides new opportunities for repair. If a die containing programmable logic is included in the stack, it may be harnessed to bypass defective components of other dies. In this paper, we propose the use of an FPGA die to provide repair resources to other layers of the stack. Our simulation results show clear performance benefits when using an FPGA to replace a defective ALU of a processor even when ALUs implemented on the FPGA have longer latency.