Parallel AES Encryption Engine for Many Core Processor Arrays Using Masked S-Box
نویسندگان
چکیده
With the ever increasing growth of data communication, hardware encryption technology will become an irreplaceable safety technology. In this paper, I present a method of AES encryption and decryption algorithm with 128 bit key on an FPGA. In order to protect “data-at-rest” in memory from differential power analysis attacks with high-throughput advanced encryption standard (AES) engine with masked S-Box is proposed. By exploring different granularities of data-level and task-level parallelism, we map 2 implementations of an Advanced Encryption Standard (AES) cipher with online key expansion on a fine-grained many-core system.
منابع مشابه
Design and Implementation of Parallel AES Encryption Engines for Multi-Core Processor Arrays
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عنوان ژورنال:
- iJES
دوره 2 شماره
صفحات -
تاریخ انتشار 2014