Analysis of Four Parallel and Five Parallel Linear Phase FIR Digital Filter Using FFA Algorithm

This study presents an architectural approach to the design of Low Area and high speed linear phase Finite Impulse Response (FIR) digital filter. FIR digital filters are used in DSP by the virtue of its, linear phase, fewer finite precision error, stability and efficient implementation. In the proposed architecture, we are introduced five parallel linear phase fir filter to obtain the high speed and low Area than four parallel fir filters. So the proposed architectures offer Low Area and high speed compared to the best existing linear phase FIR filter implementations in the literature and the proposed architectures have been implemented and tested on Spartan-3 xc3s200-5pq208 FieldProgrammable Gate Array (FPGA) and synthesized.