VAPRES: A Customizable and Flexible Base Architecture for Partially Reconfigurable Systems

Partial reconfiguration (PR) enhances traditional FPGA-based high-performance reconfigurable computing by providing additional benefits such as reduced area and memory requirements, increased performance, and increased functionality as compared to non-PR systems. However, since leveraging these additional benefits requires specific designer expertise and increased design time, PR has not yet gained widespread usage. To alleviate some of PR's design challenges, we present VAPRES, a PR base architecture that provides a customizable and flexible platform for PR system and application design. VAPRES's key architectural contributions include customizable PR regions (PRRs) (e.g. size, shape, number of regions), a customizable inter-PRR communication architecture (e.g. number of and width of channels) offering reconfigurable and on-demand communication channel establishment, and seamless hardware module replacement. Finally, we present two design flows, system design and application design, to provide VAPRES design assistance.