A Design for Testability Scheme with Applications

The recent progress of high level synthesis has illuminated an effective aid for system designers. To keep pace with the development of such an environment, there is a need to consider design for testability (DFT) during the synthesis process. This paper proposes a DFT scheme that can be coordinated with data path synthesis by an interactive trade-off process. The basis of this work is a system level testability model. To quantify the qualitative description of testability, a controllability measure and an observability measure is developed. Based on these two measures, a procedure of tradingoff between testing time and test hardware overhead is demonstrated. Featuring the ability to work on partial designs, this testing cost evaluation scheme is well suited to the demands of high level synthesis. Currently, simulation tools for obtaining testability measures have been completed and experiments have been conducted to validate this model.