An Optimization-Based Approach for Analog Circuit Design

An efficient approach to optimize the performance of integrated analog circuits is described. The main objectives are to speed up the design process and obtain better, possibly optimal, performance compared to manual simulation-based device sizing schemes. The automatic generation of the cost function requires only a circuit netlist, a performance specification, and process parameters supplied by the process vendor as inputs. A layout phase is included in the optimization loop which provides the possibility to include layout dependent properties, such as interconnect parasitics. Including these parasitics assures preservation of the performance after completing the circuit layout.