“Geared” Oscillator Project Final Design Review

This paper outlines the implementation and results of a variable-rate oscillating clock supply. The circuit is designed using a 130nm process, and a supply voltage of 3.6V to our internal power regulator, with an average of 1.6V output from our oscillator. Internally, the circuit is composed of 72 states, each of which produces a frequencies ranging from 575 MHz to 3.03 GHz. These frequencies are divided into 6 general ranges by varying the number of inverters in the oscillator. Each of these ranges is further divided into 12 finer-grained ranges by varying the rail voltage to the oscillator. Detailed frequency values are shown in this paper, along with typical power consumption.