Universal delay test sets for logic networks

| It has been shown earlier that, if we restrict to unate gate network (UGN) realizations, there exist universal test sets for boolean functions. Such a test set only depends on the function f , and checks any UGN realization of f for all multiple stuck-at faults and all robustly testable stuck-open faults. In this paper we prove that these universal test sets are much more powerful than implied by the above results: They also constitute complete delay fault test sets for arbitrary UGN implementations of a given function. This is even true for UGN networks which are not testable with respect to the gate or path delay fault model. Our ability to prove the temporal cor-rectness of such circuit realizations, comes from the fact that we do not argue the correctness of individual paths, but complete path systems. Keywords| Delay test, unate gate networks, universal test sets, design for testability.